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the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. ? 1998 mos integrated circuit m m m m pd16750 384-output tft-lcd source driver (compatible with 256-gray scales) data sheet document no. s13719ej4v0ds00 (4th edition) date published april 2000 ns cp (k) printed in japan the mark ? ? ? ? shows major revised points. description the m pd16750 is a source driver for tft-lcds capable of dealing with displays with 256-gray scales. data input is based on digital input configured as 8 bits by 6 dots (2 pixels), which can realize a full-color display of 16,777,216 colors by output of 256 values g -corrected by an internal d/a converter and 8-by-2 external power modules. because the output dynamic range is as large as v dd2 - 0.2 v to v ss2 + 0.2 v, level inversion operation of the lcds common electrode is rendered unnecessary. also, to be able to deal with dot-line inversion, n-line inversion and column line inversion when mounted on a single side, this source driver is equipped with a built-in 8-bit d/a converter circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. assuring a maximum clock frequency of 40 mhz when driving at 3.0 v, this driver is applicable to xga-standard tft- lcd panels and sxga tft-lcd panels. this driver is applicable to sxga tft-lcd panels by input display signal 2 systems (clock divide). features cmos level input 384 outputs input of 8 bits (gradation data) by 6 dots capable of outputting 256 values by means of 8-by-2 external power modules (16 units) and a d/a converter output dynamic range: v dd2 C 0.2 v to v ss2 + 0.2 v high-speed data transfer: f clk = 40 mhz (internal data transfer speed when operating at 3.0 v) apply for dot-line inversion, n-line inversion and column line inversion output voltage polarity inversion function (pol) display data inversion function (pol21/22) logic power supply voltage (v dd1 ) : 3.3 v 0.3 v driver power supply voltage (v dd2 ) : 9.0 v 0.5 v low power control function (lpc) ordering information part number package m pd16750n-xxx tcp (tab package) remark the tcps external shape is customized. to order the required shape, please contact one of our sales representatives.
data sheet s13719ej4v0ds00 2 m m m m pd16750 1. block diagram 64-bit bidirectional shift register c 1 c 2 c 63 c 64 data register latch level shifter d/a converter voltage follower output s 1 s 2 s 3 s 384 v 0 - v 15 pol d 00 - d 07 d 10 - d 17 d 20 - d 27 sthr r,/l clk stb sthl v dd1 v ss1 v dd2 v ss2 pol21 pol22 d 30 - d 37 d 40 - d 47 d 50 - d 57 lpc remark /xxx indicates active low si gnal. 2. relationship between output circuit and d/a converter v 0 v 7 v 8 v 15 8 8 s 1 s 2 s 383 s 384 8-bit d/a converter multi- plexer pol
data sheet s13719ej4v0ds00 3 m m m m pd16750 3. pin configuration ( m m m m pd16750n-xxx) s 384 s 383 v ss2 s 382 v dd2 v 14 v 12 v 10 v 8 v 6 v 4 v 2 v 0 r,/l d 50 d 51 d 52 d 53 d 54 d 55 d 56 d 57 d 40 d 41 d 42 d 43 d 44 d 45 d 46 d 47 d 30 d 31 d 32 d 33 d 34 d 35 d 36 d 37 pol21 pol22 pol stb sthl v dd1 clk v ss1 lpc sthr d 20 d 21 d 22 d 23 d 24 d 25 d 26 d 27 d 10 d 11 d 12 d 13 d 14 d 15 d 16 d 17 d 00 d 01 d 02 d 03 d 04 d 05 d 06 d 07 v 1 v 3 v 5 v 7 v 9 v 11 s 3 v 13 s 2 v 15 s 1 v dd2 v ss2 copper foil surface remark this figure does not specify the tcp package. ? ?
data sheet s13719ej4v0ds00 4 m m m m pd16750 4. pin functions pin symbol pin name description s 1 to s 384 driver output the d/a converted 256-gray-scale analog voltage is output. d 00 to d 07 d 10 to d 17 d 20 to d 27 d 30 to d 37 d 40 to d 47 d 50 to d 57 display data input the display data is input with a width of 48 bits, viz., the gray scale data (8 bits) by 6 dots (2 pixels). d x0 : lsb, d x7 : msb r,/l shift direction control input these refer to the start pulse input/output pins when driver ics are connected in cascade. the shift directions of the shift registers are as follows. r,/l = h : sthr input, s 1 ? s 384 , sthl output r,/l = l : sthl input, s 384 ? s 1 , sthr output sthr right shift start pulse input/output r,/l = h : becomes the start pulse input pin. r,/l = l : becomes the start pulse output pin. sthl left shift start pulse input/output r,/l = h : becomes the start pulse output pin. r,/l = l : becomes the start pulse input pin. clk shift clock input refers to the shift registers shift clock input. the display data is incorporated into the data register at the rising edge of the 64th clock after the start pulse input, the start pulse output reaches the high level, thus becoming the start pulse of the next-level driver. stb latch input the contents of the data register are transferred to the latch circuit at the rising edge. and, at the falling edge, the gray scale voltage is supplied to the driver. it is necessary to ensure input of one pulse per horizontal period. pol polarity input pol = l : the s 2nC1 output uses v 0 to v 7 as the reference supply. the s 2n output uses v 8 to v 15 as the reference supply. pol = h : the s 2nC1 output uses v 8 to v 15 as the reference supply. the s 2n output uses v 0 to v 7 as the reference supply. s 2n-1 indicates the odd output: and s 2n indicates the even output. input of the pol signal is allowed the setup time(t pol - stb ) with respect to stbs rising edge. pol21 pol22 data inversion data inversion can invert when display data is loaded. pol21/22 = h : data inversion loads display data after inverting it. pol21/22 = l : data inversion does not invert input data. pol21: d 00 to d 07 , d 10 to d 17 , d 20 to d 27 pol22: d 30 to d 37 , d 40 to d 47 , d 50 to d 57 lpc low power control input the output buffer constant current source is blocked, reducing current consumption. in lower power mode (lpc = l: dc-level input possible), the ordinary static current consumption can be reduced by approx. 33 %. v 0 to v 15 g -corrected power supplies input the g -corrected power supplies from outside by using operational amplifier. make sure to maintain the following relationships. during the gray scale voltage output, be sure to keep the gray scale level power supply at a constant level. v dd2 - 0.2 v > v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 > 0.5 v dd2 0.5 v dd2 - 0.3 v > v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 > v ss2 + 0.2 v v dd1 logic power supply 3.3 v 0.3 v v dd2 driver power supply 9.0 v 0.5 v v ss1 logic ground grounding v ss2 driver ground grounding
data sheet s13719ej4v0ds00 5 m m m m pd16750 cautions 1. the power start sequence must be v dd1 , logic input, and v dd2 & v 0 to v 15 in that order. reverse this sequence to shut down (simultaneous power application to v dd2 and v 0 to v 15 is possible.). 2. to stabilize the supply voltage, please be sure to insert a 0.1- m m m m f bypass capacitor between v dd1 -v ss1 and v dd2 -v ss2 . furthermore, for increased precision of the d/a converter, insertion of a bypass capacitor of about 0.01 m m m m f is also advised between the g g g g -corrected power supply terminals (v 0 , v 1 , v 2 ,....., v 15 ) and v ss2 .
data sheet s13719ej4v0ds00 6 m m m m pd16750 5. relationship between input data and output voltage value this product incorporates a 8-bit d/a converter whose odd output pins and even output pins output respectively gray scale voltages of differing polarity with respect to the lcds counter electrode (common electrode) voltage. the d/a converter consists of ladder resistors. figure 5 - 1 shows the relationship between the driving voltages such as liquid-crystal driving voltages v dd2 and v ss2 , common electrode potential v com , and g -corrected voltages v 0 to v 15 and the input data. be sure to maintain the voltage relationships of v dd2 - 0.2 v > v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 > 0.5 v dd2 , 0.5 v dd2 - 0.3 v > v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 > v ss2 + 0.2 v figures 5 - 2 and 5 - 3 show the relationship between the input data and the output voltage. this driver ic is designed for only single-sided mounting. therefore, please do not use it for g -corrected power supply level inversion in double-sided mounting. figure 5C1. relationship between input data and g g g g -corrected power supplies v 1 v 2 v 3 v 4 v ss2 00 20 40 80 c0 e0 ff v 0 v 10 v 7 v 11 v dd2 64 32 32 v 5 v 6 32 32 e0 v 12 v 15 64 64 32 32 32 32 fe v 13 v 14 split interval 64 0.3 v v 8 0.5 v dd2 0.2 v v 9 0.2 v input data (hex)
data sheet s13719ej4v0ds00 7 m m m m pd16750 figure 5C2. relationship between input data and output voltage (1/4) v dd2 C 0.2 v > v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 > 0.5 v dd2 , pol21/22 = l data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) 00h00000000 v 0 ' v 0 r0 400.0 01h00000001 v 1 ' v 1 +(v 0 -v 1 ) x 3465.0 / 3865 r1 362.5 02h00000010 v 2 ' v 1 +(v 0 -v 1 ) x 3102.5 / 3865 r2 325.0 03h00000011 v 3 ' v 1 +(v 0 -v 1 ) x 2777.5 / 3865 r3 287.5 04h00000100 v 4 ' v 1 +(v 0 -v 1 ) x 2490.0 / 3865 r4 250.0 05h00000101 v 5 ' v 1 +(v 0 -v 1 ) x 2240.0 / 3865 r5 222.5 06h00000110 v 6 ' v 1 +(v 0 -v 1 ) x 2017.5 / 3865 r6 195.0 07h00000111 v 7 ' v 1 +(v 0 -v 1 ) x 1822.5 / 3865 r7 170.0 08h00001000 v 8 ' v 1 +(v 0 -v 1 ) x 1652.5 / 3865 r8 145.0 09h00001001 v 9 ' v 1 +(v 0 -v 1 ) x 1507.5 / 3865 r9 120.0 0ah00001010 v 10 ' v 1 +(v 0 -v 1 ) x 1387.5 / 3865 r10 120.0 0bh00001011 v 11 ' v 1 +(v 0 -v 1 ) x 1267.5 / 3865 r11 120.0 0ch00001100 v 12 ' v 1 +(v 0 -v 1 ) x 1147.5 / 3865 r12 95.0 0dh00001101 v 13 ' v 1 +(v 0 -v 1 ) x 1052.5 / 3865 r13 95.0 0eh00001110 v 14 ' v 1 +(v 0 -v 1 ) x 957.5 / 3865 r14 95.0 0fh00001111 v 15 ' v 1 +(v 0 -v 1 ) x 862.5 / 3865 r15 75.0 10h00010000 v 16 ' v 1 +(v 0 -v 1 ) x 787.5 / 3865 r16 75.0 11h00010001 v 17 ' v 1 +(v 0 -v 1 ) x 712.5 / 3865 r17 75.0 12h00010010 v 18 ' v 1 +(v 0 -v 1 ) x 637.5 / 3865 r18 62.5 13h00010011 v 19 ' v 1 +(v 0 -v 1 ) x 575.0 / 3865 r19 62.5 14h00010100 v 20 ' v 1 +(v 0 -v 1 ) x 512.5 / 3865 r20 62.5 15h00010101 v 21 ' v 1 +(v 0 -v 1 ) x 450.0 / 3865 r21 50.0 16h00010110 v 22 ' v 1 +(v 0 -v 1 ) x 400.0 / 3865 r22 50.0 17h00010111 v 23 ' v 1 +(v 0 -v 1 ) x 350.0 / 3865 r23 50.0 18h00011000 v 24 ' v 1 +(v 0 -v 1 ) x 300.0 / 3865 r24 37.5 19h00011001 v 25 ' v 1 +(v 0 -v 1 ) x 262.5 / 3865 r25 37.5 1ah00011010 v 26 ' v 1 +(v 0 -v 1 ) x 225.0 / 3865 r26 37.5 1bh00011011 v 27 ' v 1 +(v 0 -v 1 ) x 187.5 / 3865 r27 37.5 1ch00011100 v 28 ' v 1 +(v 0 -v 1 ) x 150.0 / 3865 r28 37.5 1dh00011101 v 29 ' v 1 +(v 0 -v 1 ) x 112.5 / 3865 r29 37.5 1eh00011110 v 30 ' v 1 +(v 0 -v 1 ) x 75.0 / 3865 r30 37.5 1fh00011111 v 31 ' v 1 +(v 0 -v 1 ) x 37.5 / 3865 r31 37.5 20h00100000 v 32 ' v 1 r32 35.0 21h00100001 v 33 ' v 2 +(v 1 -v 2 ) x 965.0 / 1000 r33 35.0 22h00100010 v 34 ' v 2 +(v 1 -v 2 ) x 930.0 / 1000 r34 35.0 23h00100011 v 35 ' v 2 +(v 1 -v 2 ) x 895.0 / 1000 r35 35.0 24h00100100 v 36 ' v 2 +(v 1 -v 2 ) x 860.0 / 1000 r36 35.0 25h00100101 v 37 ' v 2 +(v 1 -v 2 ) x 825.0 / 1000 r37 35.0 26h00100110 v 38 ' v 2 +(v 1 -v 2 ) x 790.0 / 1000 r38 35.0 27h00100111 v 39 ' v 2 +(v 1 -v 2 ) x 755.0 / 1000 r39 35.0 28h00101000 v 40 ' v 2 +(v 1 -v 2 ) x 720.0 / 1000 r40 32.5 29h00101001 v 41 ' v 2 +(v 1 -v 2 ) x 687.5 / 1000 r41 32.5 2ah00101010 v 42 ' v 2 +(v 1 -v 2 ) x 655.0 / 1000 r42 32.5 2bh00101011 v 43 ' v 2 +(v 1 -v 2 ) x 622.5 / 1000 r43 32.5 2ch00101100 v 44 ' v 2 +(v 1 -v 2 ) x 590.0 / 1000 r44 32.5 2dh00101101 v 45 ' v 2 +(v 1 -v 2 ) x 557.5 / 1000 r45 32.5 2eh00101110 v 46 ' v 2 +(v 1 -v 2 ) x 525.0 / 1000 r46 32.5 2fh00101111 v 47 ' v 2 +(v 1 -v 2 ) x 492.5 / 1000 r47 32.5 30h00110000 v 48 ' v 2 +(v 1 -v 2 ) x 460.0 / 1000 r48 30.0 31h00110001 v 49 ' v 2 +(v 1 -v 2 ) x 430.0 / 1000 r49 30.0 32h00110010 v 50 ' v 2 +(v 1 -v 2 ) x 400.0 / 1000 r50 30.0 33h00110011 v 51 ' v 2 +(v 1 -v 2 ) x 370.0 / 1000 r51 30.0 34h00110100 v 52 ' v 2 +(v 1 -v 2 ) x 340.0 / 1000 r52 30.0 35h00110101 v 53 ' v 2 +(v 1 -v 2 ) x 310.0 / 1000 r53 30.0 36h00110110 v 54 ' v 2 +(v 1 -v 2 ) x 280.0 / 1000 r54 30.0 37h00110111 v 55 ' v 2 +(v 1 -v 2 ) x 250.0 / 1000 r55 30.0 38h00111000 v 56 ' v 2 +(v 1 -v 2 ) x 220.0 / 1000 r56 27.5 39h00111001 v 57 ' v 2 +(v 1 -v 2 ) x 192.5 / 1000 r57 27.5 3ah00111010 v 58 ' v 2 +(v 1 -v 2 ) x 165.0 / 1000 r58 27.5 3bh00111011 v 59 ' v 2 +(v 1 -v 2 ) x 137.5 / 1000 r59 27.5 3ch00111100 v 60 ' v 2 +(v 1 -v 2 ) x 110.0 / 1000 r60 27.5 3dh00111101 v 61 ' v 2 +(v 1 -v 2 ) x 82.5 / 1000 r61 27.5 3eh00111110 v 62 ' v 2 +(v 1 -v 2 ) x 55.0 / 1000 r62 27.5 3fh00111111 v 63 ' v 2 +(v 1 -v 2 ) x 27.5 / 1000 r63 27.5 caution there is no connection between v 7 and v 8 in the chip. v 6 v 7 v 255 v 1 v 0 v 1 v 2 v 3 v 31 v 32 v 33 v 223 v 224 v 225 v 252 v 253 v 254 v 0 r 0 r 1 r 2 r 3 r 30 r 31 r 32 r 33 r 222 r 223 v 5 r 224 r 225 r 251 r 252 r 253 r 254
data sheet s13719ej4v0ds00 8 m m m m pd16750 figure 5C2. relationship between input data and output voltage (2/4) v dd2 C 0.2 v > v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 > 0.5 v dd2 , pol21/22 = l data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) 40h01000000 v 64 'v 2 r64 25.0 41h01000001 v 65 'v 3 +(v 2 -v 3 ) x 1575 / 1600 r65 25.0 42h01000010 v 66 'v 3 +(v 2 -v 3 ) x 1550 / 1600 r66 25.0 43h01000011 v 67 'v 3 +(v 2 -v 3 ) x 1525 / 1600 r67 25.0 44h01000100 v 68 'v 3 +(v 2 -v 3 ) x 1500 / 1600 r68 25.0 45h01000101 v 69 'v 3 +(v 2 -v 3 ) x 1475 / 1600 r69 25.0 46h01000110 v 70 'v 3 +(v 2 -v 3 ) x 1450 / 1600 r70 25.0 47h01000111 v 71 'v 3 +(v 2 -v 3 ) x 1425 / 1600 r71 25.0 48h01001000 v 72 'v 3 +(v 2 -v 3 ) x 1400 / 1600 r72 25.0 49h01001001 v 73 'v 3 +(v 2 -v 3 ) x 1375 / 1600 r73 25.0 4ah01001010 v 74 'v 3 +(v 2 -v 3 ) x 1350 / 1600 r74 25.0 4bh01001011 v 75 'v 3 +(v 2 -v 3 ) x 1325 / 1600 r75 25.0 4ch01001100 v 76 'v 3 +(v 2 -v 3 ) x 1300 / 1600 r76 25.0 4dh01001101 v 77 'v 3 +(v 2 -v 3 ) x 1275 / 1600 r77 25.0 4eh01001110 v 78 'v 3 +(v 2 -v 3 ) x 1250 / 1600 r78 25.0 4fh01001111 v 79 'v 3 +(v 2 -v 3 ) x 1225 / 1600 r79 25.0 50h01010000 v 80 'v 3 +(v 2 -v 3 ) x 1200 / 1600 r80 25.0 51h01010001 v 81 'v 3 +(v 2 -v 3 ) x 1175 / 1600 r81 25.0 52h01010010 v 82 'v 3 +(v 2 -v 3 ) x 1150 / 1600 r82 25.0 53h01010011 v 83 'v 3 +(v 2 -v 3 ) x 1125 / 1600 r83 25.0 54h01010100 v 84 'v 3 +(v 2 -v 3 ) x 1100 / 1600 r84 25.0 55h01010101 v 85 'v 3 +(v 2 -v 3 ) x 1075 / 1600 r85 25.0 56h01010110 v 86 'v 3 +(v 2 -v 3 ) x 1050 / 1600 r86 25.0 57h01010111 v 87 'v 3 +(v 2 -v 3 ) x 1025 / 1600 r87 25.0 58h01011000 v 88 'v 3 +(v 2 -v 3 ) x 1000 / 1600 r88 25.0 59h01011001 v 89 'v 3 +(v 2 -v 3 ) x 975 / 1600 r89 25.0 5ah01011010 v 90 'v 3 +(v 2 -v 3 ) x 950 / 1600 r90 25.0 5bh01011011 v 91 'v 3 +(v 2 -v 3 ) x 925 / 1600 r91 25.0 5ch01011100 v 92 'v 3 +(v 2 -v 3 ) x 900 / 1600 r92 25.0 5dh01011101 v 93 'v 3 +(v 2 -v 3 ) x 875 / 1600 r93 25.0 5eh01011110 v 94 'v 3 +(v 2 -v 3 ) x 850 / 1600 r94 25.0 5fh01011111 v 95 'v 3 +(v 2 -v 3 ) x 825 / 1600 r95 25.0 60h01100000 v 96 'v 3 +(v 2 -v 3 ) x 800 / 1600 r96 25.0 61h01100001 v 97 'v 3 +(v 2 -v 3 ) x 775 / 1600 r97 25.0 62h01100010 v 98 'v 3 +(v 2 -v 3 ) x 750 / 1600 r98 25.0 63h01100011 v 99 'v 3 +(v 2 -v 3 ) x 725 / 1600 r99 25.0 64h01100100 v 100 'v 3 +(v 2 -v 3 ) x 700 / 1600 r100 25.0 65h01100101 v 101 'v 3 +(v 2 -v 3 ) x 675 / 1600 r101 25.0 66h01100110 v 102 'v 3 +(v 2 -v 3 ) x 650 / 1600 r102 25.0 67h01100111 v 103 'v 3 +(v 2 -v 3 ) x 625 / 1600 r103 25.0 68h01101000 v 104 'v 3 +(v 2 -v 3 ) x 600 / 1600 r104 25.0 69h01101001 v 105 'v 3 +(v 2 -v 3 ) x 575 / 1600 r105 25.0 6ah01101010 v 106 'v 3 +(v 2 -v 3 ) x 550 / 1600 r106 25.0 6bh01101011 v 107 'v 3 +(v 2 -v 3 ) x 525 / 1600 r107 25.0 6ch01101100 v 108 'v 3 +(v 2 -v 3 ) x 500 / 1600 r108 25.0 6dh01101101 v 109 'v 3 +(v 2 -v 3 ) x 475 / 1600 r109 25.0 6eh01101110 v 110 'v 3 +(v 2 -v 3 ) x 450 / 1600 r110 25.0 6fh01101111 v 111 'v 3 +(v 2 -v 3 ) x 425 / 1600 r111 25.0 70h01110000 v 112 'v 3 +(v 2 -v 3 ) x 400 / 1600 r112 25.0 71h01110001 v 113 'v 3 +(v 2 -v 3 ) x 375 / 1600 r113 25.0 72h01110010 v 114 'v 3 +(v 2 -v 3 ) x 350 / 1600 r114 25.0 73h01110011 v 115 'v 3 +(v 2 -v 3 ) x 325 / 1600 r115 25.0 74h01110100 v 116 'v 3 +(v 2 -v 3 ) x 300 / 1600 r116 25.0 75h01110101 v 117 'v 3 +(v 2 -v 3 ) x 275 / 1600 r117 25.0 76h01110110 v 118 'v 3 +(v 2 -v 3 ) x 250 / 1600 r118 25.0 77h01110111 v 119 'v 3 +(v 2 -v 3 ) x 225 / 1600 r119 25.0 78h01111000 v 120 'v 3 +(v 2 -v 3 ) x 200 / 1600 r120 25.0 79h01111001 v 121 'v 3 +(v 2 -v 3 ) x 175 / 1600 r121 25.0 7ah01111010 v 122 'v 3 +(v 2 -v 3 ) x 150 / 1600 r122 25.0 7bh01111011 v 123 'v 3 +(v 2 -v 3 ) x 125 / 1600 r123 25.0 7ch01111100 v 124 'v 3 +(v 2 -v 3 ) x 100 / 1600 r124 25.0 7dh01111101 v 125 'v 3 +(v 2 -v 3 ) x 75 / 1600 r125 25.0 7eh01111110 v 126 'v 3 +(v 2 -v 3 ) x 50 / 1600 r126 25.0 7fh01111111 v 127 'v 3 +(v 2 -v 3 ) x 25 / 1600 r127 25.0 caution there is no connection between v 7 and v 8 in the chip. v 6 v 7 v 255 v 1 v 0 v 1 v 2 v 3 v 31 v 32 v 33 v 223 v 224 v 225 v 252 v 253 v 254 v 0 r 0 r 1 r 2 r 3 r 30 r 31 r 32 r 33 r 222 r 223 v 5 r 224 r 225 r 251 r 252 r 253 r 254
data sheet s13719ej4v0ds00 9 m m m m pd16750 figure 5C2. relationship between input data and output voltage (3/4) v dd2 C 0.2 v > v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 > 0.5 v dd2 , pol21/22 = l data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) 80h10000000 v 128 'v 3 r128 25.0 81h10000001 v 129 'v 4 +(v 3 -v 4 ) x 1875.0 / 1900.0 r129 25.0 82h10000010 v 130 'v 4 +(v 3 -v 4 ) x 1850.0 / 1900.0 r130 25.0 83h10000011 v 131 'v 4 +(v 3 -v 4 ) x 1825.0 / 1900.0 r131 25.0 84h10000100 v 132 'v 4 +(v 3 -v 4 ) x 1800.0 / 1900.0 r132 25.0 85h10000101 v 133 'v 4 +(v 3 -v 4 ) x 1775.0 / 1900.0 r133 25.0 86h10000110 v 134 'v 4 +(v 3 -v 4 ) x 1750.0 / 1900.0 r134 25.0 87h10000111 v 135 'v 4 +(v 3 -v 4 ) x 1725.0 / 1900.0 r135 25.0 88h10001000 v 136 'v 4 +(v 3 -v 4 ) x 1700.0 / 1900.0 r136 25.0 89h10001001 v 137 'v 4 +(v 3 -v 4 ) x 1675.0 / 1900.0 r137 25.0 8ah10001010 v 138 'v 4 +(v 3 -v 4 ) x 1650.0 / 1900.0 r138 25.0 8bh10001011 v 139 'v 4 +(v 3 -v 4 ) x 1625.0 / 1900.0 r139 25.0 8ch10001100 v 140 'v 4 +(v 3 -v 4 ) x 1600.0 / 1900.0 r140 25.0 8dh10001101 v 141 'v 4 +(v 3 -v 4 ) x 1575.0 / 1900.0 r141 25.0 8eh10001110 v 142 'v 4 +(v 3 -v 4 ) x 1550.0 / 1900.0 r142 25.0 8fh10001111 v 143 'v 4 +(v 3 -v 4 ) x 1525.0 / 1900.0 r143 25.0 90h10010000 v 144 'v 4 +(v 3 -v 4 ) x 1500.0 / 1900.0 r144 25.0 91h10010001 v 145 'v 4 +(v 3 -v 4 ) x 1475.0 / 1900.0 r145 25.0 92h10010010 v 146 'v 4 +(v 3 -v 4 ) x 1450.0 / 1900.0 r146 25.0 93h10010011 v 147 'v 4 +(v 3 -v 4 ) x 1425.0 / 1900.0 r147 25.0 94h10010100 v 148 'v 4 +(v 3 -v 4 ) x 1400.0 / 1900.0 r148 25.0 95h10010101 v 149 'v 4 +(v 3 -v 4 ) x 1375.0 / 1900.0 r149 25.0 96h10010110 v 150 'v 4 +(v 3 -v 4 ) x 1350.0 / 1900.0 r150 25.0 97h10010111 v 151 'v 4 +(v 3 -v 4 ) x 1325.0 / 1900.0 r151 25.0 98h10011000 v 152 'v 4 +(v 3 -v 4 ) x 1300.0 / 1900.0 r152 27.5 99h10011001 v 153 'v 4 +(v 3 -v 4 ) x 1272.5 / 1900.0 r153 27.5 9ah10011010 v 154 'v 4 +(v 3 -v 4 ) x 1245.0 / 1900.0 r154 27.5 9bh10011011 v 155 'v 4 +(v 3 -v 4 ) x 1217.5 / 1900.0 r155 27.5 9ch10011100 v 156 'v 4 +(v 3 -v 4 ) x 1190.0 / 1900.0 r156 27.5 9dh10011101 v 157 'v 4 +(v 3 -v 4 ) x 1162.5 / 1900.0 r157 27.5 9eh10011110 v 158 'v 4 +(v 3 -v 4 ) x 1135.0 / 1900.0 r158 27.5 9fh10011111 v 159 'v 4 +(v 3 -v 4 ) x 1107.5 / 1900.0 r159 27.5 a0h10100000 v 160 'v 4 +(v 3 -v 4 ) x 1080.0 1900.0 r160 30.0 a1h10100001 v 161 'v 4 +(v 3 -v 4 ) x 1050.0 / 1900.0 r161 30.0 a2h10100010 v 162 'v 4 +(v 3 -v 4 ) x 1020.0 / 1900.0 r162 30.0 a3h10100011 v 163 'v 4 +(v 3 -v 4 ) x 990.0 / 1900.0 r163 30.0 a4h10100100 v 164 'v 4 +(v 3 -v 4 ) x 960.0 / 1900.0 r164 30.0 a5h10100101 v 165 'v 4 +(v 3 -v 4 ) x 930.0 / 1900.0 r165 30.0 a6h10100110 v 166 'v 4 +(v 3 -v 4 ) x 900.0 / 1900.0 r166 30.0 a7h10100111 v 167 'v 4 +(v 3 -v 4 ) x 870.0 / 1900.0 r167 30.0 a8h10101000 v 168 'v 4 +(v 3 -v 4 ) x 840.0 / 1900.0 r168 32.5 a9h10101001 v 169 'v 4 +(v 3 -v 4 ) x 807.5 / 1900.0 r169 32.5 aah10101010 v 170 'v 4 +(v 3 -v 4 ) x 775.0 / 1900.0 r170 32.5 abh10101011 v 171 'v 4 +(v 3 -v 4 ) x 742.5 / 1900.0 r171 32.5 ach10101100 v 172 'v 4 +(v 3 -v 4 ) x 710.0 / 1900.0 r172 32.5 adh10101101 v 173 'v 4 +(v 3 -v 4 ) x 677.5 / 1900.0 r173 32.5 aeh10101110 v 174 'v 4 +(v 3 -v 4 ) x 645.0 / 1900.0 r174 32.5 afh10101111 v 175 'v 4 +(v 3 -v 4 ) x 612.5 / 1900.0 r175 32.5 b0h10110000 v 176 'v 4 +(v 3 -v 4 ) x 580.0 / 1900.0 r176 35.0 b1h10110001 v 177 'v 4 +(v 3 -v 4 ) x 545.0 / 1900.0 r177 35.0 b2h10110010 v 178 'v 4 +(v 3 -v 4 ) x 510.0 / 1900.0 r178 35.0 b3h10110011 v 179 'v 4 +(v 3 -v 4 ) x 475.0 / 1900.0 r179 35.0 b4h10110100 v 180 'v 4 +(v 3 -v 4 ) x 440.0 / 1900.0 r180 35.0 b5h10110101 v 181 'v 4 +(v 3 -v 4 ) x 405.0 / 1900.0 r181 35.0 b6h10110110 v 182 'v 4 +(v 3 -v 4 ) x 370.0 / 1900.0 r182 35.0 b7h10110111 v 183 'v 4 +(v 3 -v 4 ) x 335.0 / 1900.0 r183 35.0 b8h10111000 v 184 'v 4 +(v 3 -v 4 ) x 300.0 / 1900.0 r184 37.5 b9h10111001 v 185 'v 4 +(v 3 -v 4 ) x 262.5 / 1900.0 r185 37.5 bah10111010 v 186 'v 4 +(v 3 -v 4 ) x 225.0 / 1900.0 r186 37.5 bbh10111011 v 187 'v 4 +(v 3 -v 4 ) x 187.5 / 1900.0 r187 37.5 bch10111100 v 188 'v 4 +(v 3 -v 4 ) x 150.0 / 1900.0 r188 37.5 bdh10111101 v 189 'v 4 +(v 3 -v 4 ) x 112.5 / 1900.0 r189 37.5 beh10111110 v 190 'v 4 +(v 3 -v 4 ) x 75.0 / 1900.0 r190 37.5 bfh10111111 v 191 'v 4 +(v 3 -v 4 ) x 37.5 / 1900.0 r191 37.5 caution there is no connection between v 7 and v 8 in the chip. v 6 v 7 v 255 v 1 v 0 v 1 v 2 v 3 v 31 v 32 v 33 v 223 v 224 v 225 v 252 v 253 v 254 v 0 r 0 r 1 r 2 r 3 r 30 r 31 r 32 r 33 r 222 r 223 v 5 r 224 r 225 r 251 r 252 r 253 r 254
data sheet s13719ej4v0ds00 10 m m m m pd16750 figure 5C2. relationship between input data and output voltage (4/4) v dd2 C 0.2 v > v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 > 0.5 v dd2 data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) c0h11000000 v 192 'v 4 r192 42.5 c1h11000001 v 193 'v 5 +(v 4 -v 5 ) x 1557.5 / 1600.0 r193 42.5 c2h11000010 v 194 'v 5 +(v 4 -v 5 ) x 1515.0 / 1600.0 r194 42.5 c3h11000011 v 195 'v 5 +(v 4 -v 5 ) x 1472.5 / 1600.0 r195 42.5 c4h11000100 v 196 'v 5 +(v 4 -v 5 ) x 1430.0 / 1600.0 r196 42.5 c5h11000101 v 197 'v 5 +(v 4 -v 5 ) x 1387.5 / 1600.0 r197 42.5 c6h11000110 v 198 'v 5 +(v 4 -v 5 ) x 1345.0 / 1600.0 r198 42.5 c7h11000111 v 199 'v 5 +(v 4 -v 5 ) x 1302.5 / 1600.0 r199 42.5 c8h11001000 v 200 'v 5 +(v 4 -v 5 ) x 1260.0 / 1600.0 r200 47.5 c9h11001001 v 201 'v 5 +(v 4 -v 5 ) x 1212.5 / 1600.0 r201 47.5 cah11001010 v 202 'v 5 +(v 4 -v 5 ) x 1165.0 / 1600.0 r202 47.5 cbh11001011 v 203 'v 5 +(v 4 -v 5 ) x 1117.5 / 1600.0 r203 47.5 cch11001100 v 204 'v 5 +(v 4 -v 5 ) x 1070.0 / 1600.0 r204 47.5 cdh11001101 v 205 'v 5 +(v 4 -v 5 ) x 1022.5 / 1600.0 r205 47.5 ceh11001110 v 206 'v 5 +(v 4 -v 5 ) x 975.0 / 1600.0 r206 47.5 cfh11001111 v 207 'v 5 +(v 4 -v 5 ) x 927.5 / 1600.0 r207 47.5 d0h11010000 v 208 'v 5 +(v 4 -v 5 ) x 880.0 / 1600.0 r208 52.5 d1h11010001 v 209 'v 5 +(v 4 -v 5 ) x 827.5 / 1600.0 r209 52.5 d2h11010010 v 210 'v 5 +(v 4 -v 5 ) x 775.0 / 1600.0 r210 52.5 d3h11010011 v 211 'v 5 +(v 4 -v 5 ) x 722.5 / 1600.0 r211 52.5 d4h11010100 v 212 'v 5 +(v 4 -v 5 ) x 670.0 / 1600.0 r212 52.5 d5h11010101 v 213 'v 5 +(v 4 -v 5 ) x 617.5 / 1600.0 r213 52.5 d6h11010110 v 214 'v 5 +(v 4 -v 5 ) x 565.0 / 1600.0 r214 52.5 d7h11010111 v 215 'v 5 +(v 4 -v 5 ) x 512.5 / 1600.0 r215 52.5 d8h11011000 v 216 'v 5 +(v 4 -v 5 ) x 460.0 / 1600.0 r216 57.5 d9h11011001 v 217 'v 5 +(v 4 -v 5 ) x 402.5 / 1600.0 r217 57.5 dah11011010 v 218 'v 5 +(v 4 -v 5 ) x 345.0 / 1600.0 r218 57.5 dbh11011011 v 219 'v 5 +(v 4 -v 5 ) x 287.5 / 1600.0 r219 57.5 dch11011100 v 220 'v 5 +(v 4 -v 5 ) x 230.0 / 1600.0 r220 57.5 ddh11011101 v 221 'v 5 +(v 4 -v 5 ) x 172.5 / 1600.0 r221 57.5 deh11011110 v 222 'v 5 +(v 4 -v 5 ) x 115.0 / 1600.0 r222 57.5 dfh11011111 v 223 'v 5 +(v 4 -v 5 ) x 57.5 / 1600.0 r223 57.5 e0h11100000 v 224 'v 5 r224 57.5 e1h11100001 v 225 'v 6 +(v 5 -v 6 ) x 4630.0 / 4687.5 r225 70.0 e2h11100010 v 226 'v 6 +(v 5 -v 6 ) x 4560.0 / 4687.5 r226 70.0 e3h11100011 v 227 'v 6 +(v 5 -v 6 ) x 4490.0 / 4687.5 r227 70.0 e4h11100100 v 228 'v 6 +(v 5 -v 6 ) x 4420.0 / 4687.5 r228 82.5 e5h11100101 v 229 'v 6 +(v 5 -v 6 ) x 4337.5 / 4687.5 r229 82.5 e6h11100110 v 230 'v 6 +(v 5 -v 6 ) x 4255.0 / 4687.5 r230 82.5 e7h11100111 v 231 'v 6 +(v 5 -v 6 ) x 4172.5 / 4687.5 r231 95.0 e8h11101000 v 232 'v 6 +(v 5 -v 6 ) x 4077.5 / 4687.5 r232 95.0 e9h11101001 v 233 'v 6 +(v 5 -v 6 ) x 3982.5 / 4687.5 r233 95.0 eah11101010 v 234 'v 6 +(v 5 -v 6 ) x 3887.5 / 4687.5 r234 112.5 ebh11101011 v 235 'v 6 +(v 5 -v 6 ) x 3775.0 / 4687.5 r235 112.5 ech11101100 v 236 'v 6 +(v 5 -v 6 ) x 3662.5 / 4687.5 r236 112.5 edh11101101 v 237 'v 6 +(v 5 -v 6 ) x 3550.0 / 4687.5 r237 130.0 eeh11101110 v 238 'v 6 +(v 5 -v 6 ) x 3420.0 / 4687.5 r238 130.0 efh11101111 v 239 'v 6 +(v 5 -v 6 ) x 3290.0 / 4687.5 r239 147.5 f0h11110000 v 240 'v 6 +(v 5 -v 6 ) x 3142.5 / 4687.5 r240 147.5 f1h11110001 v 241 'v 6 +(v 5 -v 6 ) x 2995.0 / 4687.5 r241 165.0 f2h11110010 v 242 'v 6 +(v 5 -v 6 ) x 2830.0 / 4687.5 r242 165.0 f3h11110011 v 243 'v 6 +(v 5 -v 6 ) x 2665.0 / 4687.5 r243 182.5 f4h11110100 v 244 'v 6 +(v 5 -v 6 ) x 2482.5 / 4687.5 r244 182.5 f5h11110101 v 245 'v 6 +(v 5 -v 6 ) x 2300.0 / 4687.5 r245 200.0 f6h11110110 v 246 'v 6 +(v 5 -v 6 ) x 2100.0 / 4687.5 r246 200.0 f7h11110111 v 247 'v 6 +(v 5 -v 6 ) x 1900.0 / 4687.5 r247 225.0 f8h11111000 v 248 'v 6 +(v 5 -v 6 ) x 1675.0 / 4687.5 r248 225.0 f9h11111001 v 249 'v 6 +(v 5 -v 6 ) x 1450.0 / 4687.5 r249 250.0 fah11111010 v 250 'v 6 +(v 5 -v 6 ) x 1200.0 / 4687.5 r250 250.0 fbh11111011 v 251 'v 6 +(v 5 -v 6 ) x 950.0 / 4687.5 r251 300.0 fch11111100 v 252 'v 6 +(v 5 -v 6 ) x 650.0 / 4687.5 r252 300.0 fdh11111101 v 253 'v 6 +(v 5 -v 6 ) x 350.0 / 4687.5 r253 350.0 feh11111110 v 254 'v 6 r254 350.0 ffh11111111 v 255 'v 7 total 15002.5 caution there is no connection between v 7 and v 8 in the chip. v 6 v 7 v 255 v 1 v 0 v 1 v 2 v 3 v 31 v 32 v 33 v 223 v 224 v 225 v 252 v 253 v 254 v 0 r 0 r 1 r 2 r 3 r 30 r 31 r 32 r 33 r 222 r 223 v 5 r 224 r 225 r 251 r 252 r 253 r 254
data sheet s13719ej4v0ds00 11 m m m m pd16750 figure 5C3. relationship between input data and output voltage (1/4) 0.5 v dd2 C 0.3 v > v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 > v ss2 + 0.2 v, pol21/22 = l data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) 00h00000000 v 0 "v 15 r0 400.0 01h00000001 v 1 "v 15 +(v 14 -v 15 ) x 400.0 / 3865 r1 362.5 02h00000010 v 2 "v 15 +(v 14 -v 15 ) x 762.5 / 3865 r2 325.0 03h00000011 v 3 "v 15 +(v 14 -v 15 ) x 1087.5 / 3865 r3 287.5 04h00000100 v 4 "v 15 +(v 14 -v 15 ) x 1375.0 / 3865 r4 250.0 05h00000101 v 5 "v 15 +(v 14 -v 15 ) x 1625.0 / 3865 r5 222.5 06h00000110 v 6 "v 15 +(v 14 -v 15 ) x 1847.5 / 3865 r6 195.0 07h00000111 v 7 "v 15 +(v 14 -v 15 ) x 2042.5 / 3865 r7 170.0 08h00001000 v 8 "v 15 +(v 14 -v 15 ) x 2212.5 / 3865 r8 145.0 09h00001001 v 9 "v 15 +(v 14 -v 15 ) x 2357.5 / 3865 r9 120.0 0ah00001010 v 10 "v 15 +(v 14 -v 15 ) x 2477.5 / 3865 r10 120.0 0bh00001011 v 11 "v 15 +(v 14 -v 15 ) x 2597.5 / 3865 r11 120.0 0ch00001100 v 12 "v 15 +(v 14 -v 15 ) x 2717.5 / 3865 r12 95.0 0dh00001101 v 13 "v 15 +(v 14 -v 15 ) x 2812.5 / 3865 r13 95.0 0eh00001110 v 14 "v 15 +(v 14 -v 15 ) x 2907.5 / 3865 r14 95.0 0fh00001111 v 15 "v 15 +(v 14 -v 15 ) x 3002.5 / 3865 r15 75.0 10h00010000 v 16 "v 15 +(v 14 -v 15 ) x 3077.5 / 3865 r16 75.0 11h00010001 v 17 "v 15 +(v 14 -v 15 ) x 3152.5 / 3865 r17 75.0 12h00010010 v 18 "v 15 +(v 14 -v 15 ) x 3227.5 / 3865 r18 62.5 13h00010011 v 19 "v 15 +(v 14 -v 15 ) x 3290.0 / 3865 r19 62.5 14h00010100 v 20 "v 15 +(v 14 -v 15 ) x 3352.5 / 3865 r20 62.5 15h00010101 v 21 "v 15 +(v 14 -v 15 ) x 3415.0 / 3865 r21 50.0 16h00010110 v 22 "v 15 +(v 14 -v 15 ) x 3465.0 / 3865 r22 50.0 17h00010111 v 23 "v 15 +(v 14 -v 15 ) x 3515.0 / 3865 r23 50.0 18h00011000 v 24 "v 15 +(v 14 -v 15 ) x 3565.0 / 3865 r24 37.5 19h00011001 v 25 "v 15 +(v 14 -v 15 ) x 3602.5 / 3865 r25 37.5 1ah00011010 v 26 "v 15 +(v 14 -v 15 ) x 3640.0 / 3865 r26 37.5 1bh00011011 v 27 "v 15 +(v 14 -v 15 ) x 3677.5 / 3865 r27 37.5 1ch00011100 v 28 "v 15 +(v 14 -v 15 ) x 3715.0 / 3865 r28 37.5 1dh00011101 v 29 "v 15 +(v 14 -v 15 ) x 3752.5 / 3865 r29 37.5 1eh00011110 v 30 "v 15 +(v 14 -v 15 ) x 3790.0 / 3865 r30 37.5 1fh00011111 v 31 "v 15 +(v 14 -v 15 ) x 3827.5 / 3865 r31 37.5 20h00100000 v 32 "v 14 r32 35.0 21h00100001 v 33 "v 14 +(v 13 -v 14 ) x 35.0 / 1000 r33 35.0 22h00100010 v 34 "v 14 +(v 13 -v 14 ) x 70.0 / 1000 r34 35.0 23h00100011 v 35 "v 14 +(v 13 -v 14 ) x 105.0 / 1000 r35 35.0 24h00100100 v 36 "v 14 +(v 13 -v 14 ) x 140.0 / 1000 r36 35.0 25h00100101 v 37 "v 14 +(v 13 -v 14 ) x 175.0 / 1000 r37 35.0 26h00100110 v 38 "v 14 +(v 13 -v 14 ) x 210.0 / 1000 r38 35.0 27h00100111 v 39 "v 14 +(v 13 -v 14 ) x 245.0 / 1000 r39 35.0 28h00101000 v 40 "v 14 +(v 13 -v 14 ) x 280.0 / 1000 r40 32.5 29h00101001 v 41 "v 14 +(v 13 -v 14 ) x 312.5 / 1000 r41 32.5 2ah00101010 v 42 "v 14 +(v 13 -v 14 ) x 345.0 / 1000 r42 32.5 2bh00101011 v 43 "v 14 +(v 13 -v 14 ) x 377.5 / 1000 r43 32.5 2ch00101100 v 44 "v 14 +(v 13 -v 14 ) x 410.0 / 1000 r44 32.5 2dh00101101 v 45 "v 14 +(v 13 -v 14 ) x 442.5 / 1000 r45 32.5 2eh00101110 v 46 "v 14 +(v 13 -v 14 ) x 475.0 / 1000 r46 32.5 2fh00101111 v 47 "v 14 +(v 13 -v 14 ) x 507.5 / 1000 r47 32.5 30h00110000 v 48 "v 14 +(v 13 -v 14 ) x 540.0 / 1000 r48 30.0 31h00110001 v 49 "v 14 +(v 13 -v 14 ) x 570.0 / 1000 r49 30.0 32h00110010 v 50 "v 14 +(v 13 -v 14 ) x 600.0 / 1000 r50 30.0 33h00110011 v 51 "v 14 +(v 13 -v 14 ) x 630.0 / 1000 r51 30.0 34h00110100 v 52 "v 14 +(v 13 -v 14 ) x 660.0 / 1000 r52 30.0 35h00110101 v 53 "v 14 +(v 13 -v 14 ) x 690.0 / 1000 r53 30.0 36h00110110 v 54 "v 14 +(v 13 -v 14 ) x 720.0 / 1000 r54 30.0 37h00110111 v 55 "v 14 +(v 13 -v 14 ) x 750.0 / 1000 r55 30.0 38h00111000 v 56 "v 14 +(v 13 -v 14 ) x 780.0 / 1000 r56 27.5 39h00111001 v 57 "v 14 +(v 13 -v 14 ) x 807.5 / 1000 r57 27.5 3ah00111010 v 58 "v 14 +(v 13 -v 14 ) x 835.0 / 1000 r58 27.5 3bh00111011 v 59 "v 14 +(v 13 -v 14 ) x 862.5 / 1000 r59 27.5 3ch00111100 v 60 "v 14 +(v 13 -v 14 ) x 890.0 / 1000 r60 27.5 3dh00111101 v 61 "v 14 +(v 13 -v 14 ) x 917.5 / 1000 r61 27.5 3eh00111110 v 62 "v 14 +(v 13 -v 14 ) x 945.0 / 1000 r62 27.5 3fh00111111 v 63 "v 14 +(v 13 -v 14 ) x 972.5 / 1000 r63 27.5 caution there is no connection between v 7 and v 8 in the chip. v 33 v 0 v 32 v 31 v 2 v 1 v 254 v 253 v 252 v 225 v 224 v 223 r 252 r 251 r 250 r 225 r 224 r 223 r 222 v 10 r 253 v 9 r 33 r 0 r 32 r 31 r 30 r 2 r 1 v 15 v 14 v 251 v 255 v 8 r 254
data sheet s13719ej4v0ds00 12 m m m m pd16750 figure 5C3. relationship between input data and output voltage (2/4) 0.5 v dd2 C 0.3 v > v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 > v ss2 + 0.2 v, pol21/22 = l data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) 40h01000000 v 64 "v 13 r64 25.0 41h01000001 v 65 "v 13 +(v 12 -v 13 ) x 25 / 1600 r65 25.0 42h01000010 v 66 "v 13 +(v 12 -v 13 ) x 50 / 1600 r66 25.0 43h01000011 v 67 "v 13 +(v 12 -v 13 ) x 75 / 1600 r67 25.0 44h01000100 v 68 "v 13 +(v 12 -v 13 ) x 100 / 1600 r68 25.0 45h01000101 v 69 "v 13 +(v 12 -v 13 ) x 125 / 1600 r69 25.0 46h01000110 v 70 "v 13 +(v 12 -v 13 ) x 150 / 1600 r70 25.0 47h01000111 v 71 "v 13 +(v 12 -v 13 ) x 175 / 1600 r71 25.0 48h01001000 v 72 "v 13 +(v 12 -v 13 ) x 200 / 1600 r72 25.0 49h01001001 v 73 "v 13 +(v 12 -v 13 ) x 225 / 1600 r73 25.0 4ah01001010 v 74 "v 13 +(v 12 -v 13 ) x 250 / 1600 r74 25.0 4bh01001011 v 75 "v 13 +(v 12 -v 13 ) x 275 / 1600 r75 25.0 4ch01001100 v 76 "v 13 +(v 12 -v 13 ) x 300 / 1600 r76 25.0 4dh01001101 v 77 "v 13 +(v 12 -v 13 ) x 325 / 1600 r77 25.0 4eh01001110 v 78 "v 13 +(v 12 -v 13 ) x 350 / 1600 r78 25.0 4fh01001111 v 79 "v 13 +(v 12 -v 13 ) x 375 / 1600 r79 25.0 50h01010000 v 80 "v 13 +(v 12 -v 13 ) x 400 / 1600 r80 25.0 51h01010001 v 81 "v 13 +(v 12 -v 13 ) x 425 / 1600 r81 25.0 52h01010010 v 82 "v 13 +(v 12 -v 13 ) x 450 / 1600 r82 25.0 53h01010011 v 83 "v 13 +(v 12 -v 13 ) x 475 / 1600 r83 25.0 54h01010100 v 84 "v 13 +(v 12 -v 13 ) x 500 / 1600 r84 25.0 55h01010101 v 85 "v 13 +(v 12 -v 13 ) x 525 / 1600 r85 25.0 56h01010110 v 86 "v 13 +(v 12 -v 13 ) x 550 / 1600 r86 25.0 57h01010111 v 87 "v 13 +(v 12 -v 13 ) x 575 / 1600 r87 25.0 58h01011000 v 88 "v 13 +(v 12 -v 13 ) x 600 / 1600 r88 25.0 59h01011001 v 89 "v 13 +(v 12 -v 13 ) x 625 / 1600 r89 25.0 5ah01011010 v 90 "v 13 +(v 12 -v 13 ) x 650 / 1600 r90 25.0 5bh01011011 v 91 "v 13 +(v 12 -v 13 ) x 675 / 1600 r91 25.0 5ch01011100 v 92 "v 13 +(v 12 -v 13 ) x 700 / 1600 r92 25.0 5dh01011101 v 93 "v 13 +(v 12 -v 13 ) x 725 / 1600 r93 25.0 5eh01011110 v 94 "v 13 +(v 12 -v 13 ) x 750 / 1600 r94 25.0 5fh01011111 v 95 "v 13 +(v 12 -v 13 ) x 775 / 1600 r95 25.0 60h01100000 v 96 "v 13 +(v 12 -v 13 ) x 800 1600 r96 25.0 61h01100001 v 97 "v 13 +(v 12 -v 13 ) x 825 / 1600 r97 25.0 62h01100010 v 98 "v 13 +(v 12 -v 13 ) x 850 / 1600 r98 25.0 63h01100011 v 99 "v 13 +(v 12 -v 13 ) x 875 / 1600 r99 25.0 64h01100100 v 100 "v 13 +(v 12 -v 13 ) x 900 / 1600 r100 25.0 65h01100101 v 101 "v 13 +(v 12 -v 13 ) x 925 / 1600 r101 25.0 66h01100110 v 102 "v 13 +(v 12 -v 13 ) x 950 / 1600 r102 25.0 67h01100111 v 103 "v 13 +(v 12 -v 13 ) x 975 / 1600 r103 25.0 68h01101000 v 104 "v 13 +(v 12 -v 13 ) x 1000 / 1600 r104 25.0 69h01101001 v 105 "v 13 +(v 12 -v 13 ) x 1025 / 1600 r105 25.0 6ah01101010 v 106 "v 13 +(v 12 -v 13 ) x 1050 / 1600 r106 25.0 6bh01101011 v 107 "v 13 +(v 12 -v 13 ) x 1075 / 1600 r107 25.0 6ch01101100 v 108 "v 13 +(v 12 -v 13 ) x 1100 / 1600 r108 25.0 6dh01101101 v 109 "v 13 +(v 12 -v 13 ) x 1125 / 1600 r109 25.0 6eh01101110 v 110 "v 13 +(v 12 -v 13 ) x 1150 / 1600 r110 25.0 6fh01101111 v 111 "v 13 +(v 12 -v 13 ) x 1175 / 1600 r111 25.0 70h01110000 v 112 "v 13 +(v 12 -v 13 ) x 1200 / 1600 r112 25.0 71h01110001 v 113 "v 13 +(v 12 -v 13 ) x 1225 / 1600 r113 25.0 72h01110010 v 114 "v 13 +(v 12 -v 13 ) x 1250 / 1600 r114 25.0 73h01110011 v 115 "v 13 +(v 12 -v 13 ) x 1275 / 1600 r115 25.0 74h01110100 v 116 "v 13 +(v 12 -v 13 ) x 1300 / 1600 r116 25.0 75h01110101 v 117 "v 13 +(v 12 -v 13 ) x 1325 / 1600 r117 25.0 76h01110110 v 118 "v 13 +(v 12 -v 13 ) x 1350 / 1600 r118 25.0 77h01110111 v 119 "v 13 +(v 12 -v 13 ) x 1375 / 1600 r119 25.0 78h01111000 v 120 "v 13 +(v 12 -v 13 ) x 1400 / 1600 r120 25.0 79h01111001 v 121 "v 13 +(v 12 -v 13 ) x 1425 / 1600 r121 25.0 7ah01111010 v 122 "v 13 +(v 12 -v 13 ) x 1450 / 1600 r122 25.0 7bh01111011 v 123 "v 13 +(v 12 -v 13 ) x 1475 / 1600 r123 25.0 7ch01111100 v 124 "v 13 +(v 12 -v 13 ) x 1500 / 1600 r124 25.0 7dh01111101 v 125 "v 13 +(v 12 -v 13 ) x 1525 / 1600 r125 25.0 7eh01111110 v 126 "v 13 +(v 12 -v 13 ) x 1550 / 1600 r126 25.0 7fh01111111 v 127 "v 13 +(v 12 -v 13 ) x 1575 / 1600 r127 25.0 caution there is no connection between v 7 and v 8 in the chip. v 33 v 0 v 32 v 31 v 2 v 1 v 254 v 253 v 252 v 225 v 224 v 223 r 252 r 251 r 250 r 225 r 224 r 223 r 222 v 10 r 253 v 9 r 33 r 0 r 32 r 31 r 30 r 2 r 1 v 15 v 14 v 251 v 255 v 8 r 254
data sheet s13719ej4v0ds00 13 m m m m pd16750 figure 5C3. relationship between input data and output voltage (3/4) 0.5 v dd2 C 0.3 v > v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 > v ss2 + 0.2 v, pol21/22 = l data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) 80h10000000 v 128 "v 12 r128 25.0 81h10000001 v 129 "v 12 +(v 11 -v 12 ) x 25.0 / 1900.0 r129 25.0 82h10000010 v 130 "v 12 +(v 11 -v 12 ) x 50.0 / 1900.0 r130 25.0 83h10000011 v 131 "v 12 +(v 11 -v 12 ) x 75.0 / 1900.0 r131 25.0 84h10000100 v 132 "v 12 +(v 11 -v 12 ) x 100.0 / 1900.0 r132 25.0 85h10000101 v 133 "v 12 +(v 11 -v 12 ) x 125.0 / 1900.0 r133 25.0 86h10000110 v 134 "v 12 +(v 11 -v 12 ) x 150.0 / 1900.0 r134 25.0 87h10000111 v 135 "v 12 +(v 11 -v 12 ) x 175.0 / 1900.0 r135 25.0 88h10001000 v 136 "v 12 +(v 11 -v 12 ) x 200.0 / 1900.0 r136 25.0 89h10001001 v 137 "v 12 +(v 11 -v 12 ) x 225.0 / 1900.0 r137 25.0 8ah10001010 v 138 "v 12 +(v 11 -v 12 ) x 250.0 / 1900.0 r138 25.0 8bh10001011 v 139 "v 12 +(v 11 -v 12 ) x 275.0 / 1900.0 r139 25.0 8ch10001100 v 140 "v 12 +(v 11 -v 12 ) x 300.0 / 1900.0 r140 25.0 8dh10001101 v 141 "v 12 +(v 11 -v 12 ) x 325.0 / 1900.0 r141 25.0 8eh10001110 v 142 "v 12 +(v 11 -v 12 ) x 350.0 / 1900.0 r142 25.0 8fh10001111 v 143 "v 12 +(v 11 -v 12 ) x 375.0 / 1900.0 r143 25.0 90h10010000 v 144 "v 12 +(v 11 -v 12 ) x 400.0 / 1900.0 r144 25.0 91h10010001 v 145 "v 12 +(v 11 -v 12 ) x 425.0 / 1900.0 r145 25.0 92h10010010 v 146 "v 12 +(v 11 -v 12 ) x 450.0 / 1900.0 r146 25.0 93h10010011 v 147 "v 12 +(v 11 -v 12 ) x 475.0 / 1900.0 r147 25.0 94h10010100 v 148 "v 12 +(v 11 -v 12 ) x 500.0 / 1900.0 r148 25.0 95h10010101 v 149 "v 12 +(v 11 -v 12 ) x 525.0 / 1900.0 r149 25.0 96h10010110 v 150 "v 12 +(v 11 -v 12 ) x 550.0 / 1900.0 r150 25.0 97h10010111 v 151 "v 12 +(v 11 -v 12 ) x 575.0 / 1900.0 r151 25.0 98h10011000 v 152 "v 12 +(v 11 -v 12 ) x 600.0 / 1900.0 r152 27.5 99h10011001 v 153 "v 12 +(v 11 -v 12 ) x 627.5 / 1900.0 r153 27.5 9ah10011010 v 154 "v 12 +(v 11 -v 12 ) x 655.0 / 1900.0 r154 27.5 9bh10011011 v 155 "v 12 +(v 11 -v 12 ) x 682.5 / 1900.0 r155 27.5 9ch10011100 v 156 "v 12 +(v 11 -v 12 ) x 710.0 / 1900.0 r156 27.5 9dh10011101 v 157 "v 12 +(v 11 -v 12 ) x 737.5 / 1900.0 r157 27.5 9eh10011110 v 158 "v 12 +(v 11 -v 12 ) x 765.0 / 1900.0 r158 27.5 9fh10011111 v 159 "v 12 +(v 11 -v 12 ) x 792.5 / 1900.0 r159 27.5 a0h10100000 v 160 "v 12 +(v 11 -v 12 ) x 820.0 1900.0 r160 30.0 a1h10100001 v 161 "v 12 +(v 11 -v 12 ) x 850.0 / 1900.0 r161 30.0 a2h10100010 v 162 "v 12 +(v 11 -v 12 ) x 880.0 / 1900.0 r162 30.0 a3h10100011 v 163 "v 12 +(v 11 -v 12 ) x 910.0 / 1900.0 r163 30.0 a4h10100100 v 164 "v 12 +(v 11 -v 12 ) x 940.0 / 1900.0 r164 30.0 a5h10100101 v 165 "v 12 +(v 11 -v 12 ) x 970.0 / 1900.0 r165 30.0 a6h10100110 v 166 "v 12 +(v 11 -v 12 ) x 1000.0 / 1900.0 r166 30.0 a7h10100111 v 167 "v 12 +(v 11 -v 12 ) x 1030.0 / 1900.0 r167 30.0 a8h10101000 v 168 "v 12 +(v 11 -v 12 ) x 1060.0 / 1900.0 r168 32.5 a9h10101001 v 169 "v 12 +(v 11 -v 12 ) x 1092.5 / 1900.0 r169 32.5 aah10101010 v 170 "v 12 +(v 11 -v 12 ) x 1125.0 / 1900.0 r170 32.5 abh10101011 v 171 "v 12 +(v 11 -v 12 ) x 1157.5 / 1900.0 r171 32.5 ach10101100 v 172 "v 12 +(v 11 -v 12 ) x 1190.0 / 1900.0 r172 32.5 adh10101101 v 173 "v 12 +(v 11 -v 12 ) x 1222.5 / 1900.0 r173 32.5 aeh10101110 v 174 "v 12 +(v 11 -v 12 ) x 1255.0 / 1900.0 r174 32.5 afh10101111 v 175 "v 12 +(v 11 -v 12 ) x 1287.5 / 1900.0 r175 32.5 b0h10110000 v 176 "v 12 +(v 11 -v 12 ) x 1320.0 / 1900.0 r176 35.0 b1h10110001 v 177 "v 12 +(v 11 -v 12 ) x 1355.0 / 1900.0 r177 35.0 b2h10110010 v 178 "v 12 +(v 11 -v 12 ) x 1390.0 / 1900.0 r 178 35.0 b3h10110011 v 179 "v 12 +(v 11 -v 12 ) x 1425.0 / 1900.0 r179 35.0 b4h10110100 v 180 "v 12 +(v 11 -v 12 ) x 1460.0 / 1900.0 r180 35.0 b5h10110101 v 181 "v 12 +(v 11 -v 12 ) x 1495.0 / 1900.0 r181 35.0 b6h10110110 v 182 "v 12 +(v 11 -v 12 ) x 1530.0 / 1900.0 r182 35.0 b7h10110111 v 183 "v 12 +(v 11 -v 12 ) x 1565.0 / 1900.0 r183 35.0 b8h10111000 v 184 "v 12 +(v 11 -v 12 ) x 1600.0 / 1900.0 r184 37.5 b9h10111001 v 185 "v 12 +(v 11 -v 12 ) x 1637.5 / 1900.0 r185 37.5 bah10111010 v 186 "v 12 +(v 11 -v 12 ) x 1675.0 / 1900.0 r186 37.5 bbh10111011 v 187 "v 12 +(v 11 -v 12 ) x 1712.5 / 1900.0 r187 37.5 bch10111100 v 188 "v 12 +(v 11 -v 12 ) x 1750.0 / 1900.0 r188 37.5 bdh10111101 v 189 "v 12 +(v 11 -v 12 ) x 1787.5 / 1900.0 r189 37.5 beh10111110 v 190 "v 12 +(v 11 -v 12 ) x 1825.0 / 1900.0 r190 37.5 bfh10111111 v 191 "v 12 +(v 11 -v 12 ) x 1862.5 / 1900.0 r191 37.5 caution there is no connection between v 7 and v 8 in the chip. v 33 v 0 v 32 v 31 v 2 v 1 v 254 v 253 v 252 v 225 v 224 v 223 r 252 r 251 r 250 r 225 r 224 r 223 r 222 v 10 r 253 v 9 r 33 r 0 r 32 r 31 r 30 r 2 r 1 v 15 v 14 v 251 v 255 v 8 r 254
data sheet s13719ej4v0ds00 14 m m m m pd16750 figure 5C3. relationship between input data and output voltage (4/4) 0.5 v dd2 C 0.3 v > v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 > v ss2 + 0.2 v, pol21/22 = l data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) c0h11000000 v 192 "v 11 r192 42.5 c1h11000001 v 193 "v 11 +(v 10 -v 11 ) x 42.5 / 1600.0 r193 42.5 c2h11000010 v 194 "v 11 +(v 10 -v 11 ) x 85.0 / 1600.0 r194 42.5 c3h11000011 v 195 "v 11 +(v 10 -v 11 ) x 127.5 / 1600.0 r195 42.5 c4h11000100 v 196 "v 11 +(v 10 -v 11 ) x 170.0 / 1600.0 r196 42.5 c5h11000101 v 197 "v 11 +(v 10 -v 11 ) x 212.5 / 1600.0 r197 42.5 c6h11000110 v 198 "v 11 +(v 10 -v 11 ) x 255.0 / 1600.0 r198 42.5 c7h11000111 v 199 "v 11 +(v 10 -v 11 ) x 297.5 / 1600.0 r199 42.5 c8h11001000 v 200 "v 11 +(v 10 -v 11 ) x 340.0 / 1600.0 r200 47.5 c9h11001001 v 201 "v 11 +(v 10 -v 11 ) x 387.5 / 1600.0 r201 47.5 cah11001010 v 202 "v 11 +(v 10 -v 11 ) x 435.0 / 1600.0 r202 47.5 cbh11001011 v 203 "v 11 +(v 10 -v 11 ) x 482.5 / 1600.0 r203 47.5 cch11001100 v 204 "v 11 +(v 10 -v 11 ) x 530.0 / 1600.0 r204 47.5 cdh11001101 v 205 "v 11 +(v 10 -v 11 ) x 577.5 / 1600.0 r205 47.5 ceh11001110 v 206 "v 11 +(v 10 -v 11 ) x 625.0 / 1600.0 r206 47.5 cfh11001111 v 207 "v 11 +(v 10 -v 11 ) x 672.5 / 1600.0 r207 47.5 d0h11010000 v 208 "v 11 +(v 10 -v 11 ) x 720.0 / 1600.0 r208 52.5 d1h11010001 v 209 "v 11 +(v 10 -v 11 ) x 772.5 / 1600.0 r209 52.5 d2h11010010 v 210 "v 11 +(v 10 -v 11 ) x 825.0 / 1600.0 r210 52.5 d3h11010011 v 211 "v 11 +(v 10 -v 11 ) x 877.5 / 1600.0 r211 52.5 d4h11010100 v 212 "v 11 +(v 10 -v 11 ) x 930.0 / 1600.0 r212 52.5 d5h11010101 v 213 "v 11 +(v 10 -v 11 ) x 982.5 / 1600.0 r213 52.5 d6h11010110 v 214 "v 11 +(v 10 -v 11 ) x 1035.0 / 1600.0 r214 52.5 d7h11010111 v 215 "v 11 +(v 10 -v 11 ) x 1087.5 / 1600.0 r215 52.5 d8h11011000 v 216 "v 11 +(v 10 -v 11 ) x 1140.0 / 1600.0 r216 57.5 d9h11011001 v 217 "v 11 +(v 10 -v 11 ) x 1197.5 / 1600.0 r217 57.5 dah11011010 v 218 "v 11 +(v 10 -v 11 ) x 1255.0 / 1600.0 r218 57.5 dbh11011011 v 219 "v 11 +(v 10 -v 11 ) x 1312.5 / 1600.0 r219 57.5 dch11011100 v 220 "v 11 +(v 10 -v 11 ) x 1370.0 / 1600.0 r220 57.5 ddh11011101 v 221 "v 11 +(v 10 -v 11 ) x 1427.5 / 1600.0 r221 57.5 deh11011110 v 222 "v 11 +(v 10 -v 11 ) x 1485.0 / 1600.0 r222 57.5 dfh11011111 v 223 "v 11 +(v 10 -v 11 ) x 1542.5 / 1600.0 r223 57.5 e0h11100000 v 224 "v 10 r224 57.5 e1h11100001 v 225 "v 10 +(v 9 -v 10 ) x 57.5 / 4687.5 r225 70.0 e2h11100010 v 226 "v 10 +(v 9 -v 10 ) x 127.5 / 4687.5 r226 70.0 e3h11100011 v 227 "v 10 +(v 9 -v 10 ) x 197.5 / 4687.5 r227 70.0 e4h11100100 v 228 "v 10 +(v 9 -v 10 ) x 267.5 / 4687.5 r228 82.5 e5h11100101 v 229 "v 10 +(v 9 -v 10 ) x 350.0 / 4687.5 r229 82.5 e6h11100110 v 230 "v 10 +(v 9 -v 10 ) x 432.5 / 4687.5 r230 82.5 e7h11100111 v 231 "v 10 +(v 9 -v 10 ) x 515.0 / 4687.5 r231 95.0 e8h11101000 v 232 "v 10 +(v 9 -v 10 ) x 610.0 / 4687.5 r232 95.0 e9h11101001 v 233 "v 10 +(v 9 -v 10 ) x 705.0 / 4687.5 r233 95.0 eah11101010 v 234 "v 10 +(v 9 -v 10 ) x 800.0 / 4687.5 r234 112.5 ebh11101011 v 235 "v 10 +(v 9 -v 10 ) x 912.5 / 4687.5 r235 112.5 ech11101100 v 236 "v 10 +(v 9 -v 10 ) x 1025.0 / 4687.5 r236 112.5 edh11101101 v 237 "v 10 +(v 9 -v 10 ) x 1137.5 / 4687.5 r237 130.0 eeh11101110 v 238 "v 10 +(v 9 -v 10 ) x 1267.5 / 4687.5 r238 130.0 efh11101111 v 239 "v 10 +(v 9 -v 10 ) x 1397.5 / 4687.5 r239 147.5 f0h11110000 v 240 "v 10 +(v 9 -v 10 ) x 1545.0 / 4687.5 r240 147.5 f1h11110001 v 241 "v 10 +(v 9 -v 10 ) x 1692.5 / 4687.5 r241 165.0 f2h11110010 v 242 "v 10 +(v 9 -v 10 ) x 1857.5 / 4687.5 r242 165.0 f3h11110011 v 243 "v 10 +(v 9 -v 10 ) x 2022.5 / 4687.5 r243 182.5 f4h11110100 v 244 "v 10 +(v 9 -v 10 ) x 2205.0 / 4687.5 r244 182.5 f5h11110101 v 245 "v 10 +(v 9 -v 10 ) x 2387.5 / 4687.5 r245 200.0 f6h11110110 v 246 "v 10 +(v 9 -v 10 ) x 2587.5 / 4687.5 r246 200.0 f7h11110111 v 247 "v 10 +(v 9 -v 10 ) x 2787.5 / 4687.5 r247 225.0 f8h11111000 v 248 "v 10 +(v 9 -v 10 ) x 3012.5 / 4687.5 r248 225.0 f9h11111001 v 249 "v 10 +(v 9 -v 10 ) x 3237.5 / 4687.5 r249 250.0 fah11111010 v 250 "v 10 +(v 9 -v 10 ) x 3487.5 / 4687.5 r250 250.0 fbh11111011 v 251 "v 10 +(v 9 -v 10 ) x 3737.5 / 4687.5 r251 300.0 fch11111100 v 252 "v 10 +(v 9 -v 10 ) x 4037.5 / 4687.5 r252 300.0 fdh11111101 v 253 "v 10 +(v 9 -v 10 ) x 4337.5 / 4687.5 r253 350.0 feh11111110 v 254 "v 9 r254 350.0 ffh11111111 v 255 "v 8 total 15002.5 caution there is no connection between v 7 and v 8 in the chip. v 33 v 0 v 32 v 31 v 2 v 1 v 254 v 253 v 252 v 225 v 224 v 223 r 252 r 251 r 250 r 225 r 224 r 223 r 222 v 10 r 253 v 9 r 33 r 0 r 32 r 31 r 30 r 2 r 1 v 15 v 14 v 251 v 255 v 8 r 254
data sheet s13719ej4v0ds00 15 m m m m pd16750 6. relationship between input data and output pin data format : 8 bits x 2 rgbs (6 dots) input width : 48 bits (2-pixel data) (1) r,/l = h (right shift) output s 1 s 2 s 3 s 4 xxx s 383 s 384 data d 00 to d 07 d 10 to d 17 d 20 to d 27 d 30 to d 37 xxx d 40 to d 47 d 50 to d 57 (2) r,/l = l (left shift) output s 1 s 2 s3 s4 xxx s 383 s 384 data d 00 to d 07 d 10 to d 17 d 20 to d 27 d 30 to d 37 xxx d 40 to d 47 d 50 to d 57 pol s 2nC1 note s 2n note lv 0 to v 7 v 8 to v 15 hv 8 to v 15 v 0 to v 7 note s 2nC1 (odd output), s 2n (even output) 7. relationship between stb, pol and output waveform the output voltage is written to the lcd panel synchronized with the stb falling edge. selected voltage v 0 to v 7 hi-z stb pol s 2n s 2n-1 hi-z hi-z selected voltage v 8 to v 15 selected voltage v 0 to v 7 selected voltage v 0 to v 7 selected voltage v 8 to v 15 selected voltage v 8 to v 15
data sheet s13719ej4v0ds00 16 m m m m pd16750 8. electrical specifications absolute maximum ratings (t a = 25 c, v ss1 = v ss2 = 0 v) parameter symbol rating unit logic part supply voltage v dd1 C0.5 to +4.0 v driver part supply voltage v dd2 C0.5 to +10.0 v logic part input voltage v i1 C0.5 to v dd1 + 0.5 v driver part input voltage v i2 C0.5 to v dd2 + 0.5 v logic part output voltage v o1 C0.5 to v dd1 + 0.5 v driver part output voltage v o2 C0.5 to v dd2 + 0.5 v operating ambient temperature t a C10 to +75 c storage temperature t stg C55 to +125 c caution if the absolute maximum rating of even one of the above parameters is exceeded even momentarily, the quality of the product may be degraded. absolute maximum ratings, therefore, specify the values exceeding which the product may be physically damaged. be sure to use the product within the range of the absolute maximum ratings. recommended operating range (t a = C10 to +75 c, v ss1 = v ss2 = 0 v) parameter symbol min. typ. max. unit logic part supply voltage v dd1 3.0 3.3 3.6 v driver part supply voltage v dd2 8.5 9.0 9.5 v high-level input voltage v ih 0.7 v dd1 v dd1 v low-level input voltage v il 0 0.3 v dd1 v g -corrected voltage v 0 to v 7 0.5 v dd2 v dd2 C 0.2 v v 8 to v 15 v ss2 + 0.2 0.5 v dd2 C 0.3 v driver part output voltage v o v ss2 + 0.2 v dd2 C 0.2 v clock frequency f clk 40 mhz
data sheet s13719ej4v0ds00 17 m m m m pd16750 electrical characteristics (t a = C10 to +75 c, v dd1 = 3.3 v 0.3 v, v dd2 = 9.0 v 0.5 v, v ss1 = v ss2 = 0 v) parameter symbol condition min. typ. max. unit input leak current i il 0.1 1.0 m a high-level output voltage v oh sthr (sthl), i oh = 0 ma v dd1 C 0.1 v dd1 v low-level output voltage v ol sthr (sthl), i ol = 0 ma 0 0.1 v g -corrected supply current i g v 0 to v 7 = v 8 to v 15 v 0 pin, v 8 pin 225 450 900 m a = 4.0 v v 7 pin, v 15 pin C900 C450 C225 m a i voh v x = 7.0 v, v out = 6.5 v note C185 C90 m a driver output current i vol v x = 1.0 v, v out = 1.5 v note 120 238 m a output voltage deviation d v o v o = 0.2 v to 1.2 v v o = v dd2 C 1.2 v to v dd2 C 0.2 v 30 50 mv v o = 1.2 v to 0.5 v dd2 C 0.3 v v o = 0.5 v dd2 to v dd2 C 1.2 v 10 20 mv output swing difference deviation d v pCp v o = 0.2 v to 0.8 v v o = v dd2 C 0.8 v to v dd2 C 0.2 v 20 40 mv v o = 0.8 v to 1.2 v v o = v dd2 C 1.2 v to v dd2 C 0.8 v 10 20 mv v o = 1.2 v to 0.5 v dd2 C 0.3 v v o = 0.5 v dd2 to v dd2 C 1.2 v 3 10 mv output swing average difference deviation av o v dd2 = 8.5 v, v 0 = 7.9 v, v 3 = 6.22 v, v 7 = 4.0 v, v 8 = 4.0 v, v 12 = 1.78 v, v 12 = 0.1 v, v 1 , v 2 , v 4 , v 5 , v 6 , v 9 , v 10 , v 11 , v 13 , v 14 : open, t a = 25c, input data: 80 h 4.433 4.440 4.447 v output voltage range v o 0.2 v dd2 C 0.2 v logic part dynamic current consumption i dd1 v dd1 , with no load 0.8 6.0 ma driver part dynamic current consumption i dd2 v dd2 , with no load 4.5 11.0 ma note v x refers to the output voltage of analog output pins s 1 to s 384 . v out refers to the voltage applied to analog output pins s 1 to s 384 . cautions 1. the stb cycle is defined to be 20 m m m m s at f clk. = 40 mhz. 2. the typ. values refer to an all black or all white input pattern. the max. value refers to the measured values in the dot checkerboard input pattern. 3. refers to the current consumption per driver when cascades are connected under the assumption of xga single-sided mounting (8 units).
data sheet s13719ej4v0ds00 18 m m m m pd16750 switching characteristics (t a = C10 to +75 c, v dd1 = 3.3 v 0.3 v, v dd2 = 9.0 v 0.5 v, v ss1 = v ss2 = 0 v) parameter symbol condition min. typ. max. unit start pulse delay time t plh1 c l = 15 pf 8 20 ns t plh2 36 m s t plh3 48 m s t phl2 36 m s driver output delay time t phl3 c l = 75 pf, r l = 5 k w 48 m s c i1 sthr (sthl) excluded, t a = 25c 4.8 10 pf input capacitance c i2 sthr (sthl),t a = 25c 8.6 15 pf output r l r l r l r l r l = 1 k w c l c l c l c l c l c l = 15 pf r l
data sheet s13719ej4v0ds00 19 m m m m pd16750 timing requirements (t a = C10 to +75 c, v dd1 = 3.3 v 0.3 v, v ss1 = 0 v, t r = t f = 8.0 ns) parameter symbol condition min. typ. max. unit clock pulse width pw clk 25 ns clock pulse high period pw clk(h) 4ns clock pulse low period pw clk(l) 4ns data setup time t setup1 2ns data hold time t hold1 2ns start pulse setup time t setup2 2ns start pulse hold time t hold2 2ns pol21/22 setup time t setup3 2ns pol21/22 hold time t hold3 2ns start pulse low period t spl 1clk stb pulse width pw stb 2 m s data invalid period t inv 1clk last data timing t ldt 2clk clk-stb time t clk-stb clk - ? stb - 6ns stb-clk time t stb-clk stb - ? clk - 6ns time between stb and start pulse t stb-sth stb - ? sthr(sthl) - 2clk pol-stb time t pol-stb pol - or ? stb - C5 ns stb-pol time t stb-pol stb ? pol or - 6ns remark unless otherwise specified, the input level is defined to be v ih = 0.7 v dd1 , v il = 0.3 v dd1 . ? ?
data sheet s13719ej4v0ds00 20 m m m m pd16750 9. switching characteristic waveform (r,/l= h) unless otherwise specified, the input level is defined to be v ih = 0.7 v dd1 , v il = 0.3 v dd1 . pw clk(l) clk pol v out stb d n0 - d n7 sthr (1st dr.) sthl (1st dr.) pw clk(h) t r t setup2 invalid d 1 - d 6 t hold2 12 12 3646566 513 514 t f v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 pw clk t clk-stb t stb-clk t stb-sth t setup1/3 90 % 10 % t hold1/3 t plh1 t inv t pol-stb t stb-pol t plh3 t plh2 t phl2 t phl3 hi-z target voltage 0.1 v dd2 8-bit accuracy t ldt pw stb d 7 - d 12 d 1 - d 6 d 7 - d 12 d 373 - d 378 d 379 - d 384 d 385 - d 390 invalid invalid v dd1 v ss1 invalid t setup3 t hold3 pol21/22 d 3067 - d 3072
data sheet s13719ej4v0ds00 21 m m m m pd16750 10. recommended mounting conditions the following conditions must be met for mounting conditions of the m pd16750. for more details, refer to the semiconductor device mounting technology manual (c10535e). please consult with our sales offices in case other mounting process is used, or in case the mounting is done under different conditions. m pd16750n- xxx : tcp (tab pack age) mounting condition mounting method condition thermocompression soldering heating tool 300 to 350 c, heating for 2 to 3 seconds : pressure 100g (per solder) acf (adhesive conductive film) temporary bonding 70 to 100 c : pressure 3 to 8 kg/cm 2 : time 3 to 5 sec. real bonding 165 to 180 c: pressure 25 to 45 kg/cm 2 : time 30 to 40 sec. (when using the anisotropy conductive film sumizac1003 of sumitomo bakelite,ltd). caution to find out the detailed conditions for mounting the acf part, please contact the acf manufacturing company. be sure to avoid using two or more mounting methods at a time.
data sheet s13719ej4v0ds00 22 m m m m pd16750 [memo]
data sheet s13719ej4v0ds00 23 m m m m pd16750 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
m m m m pd16750 reference documents nec semiconductor device reliability/quality control system(c10983e) quality grades to necs semiconductor devices(c11531e) the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. nec corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. m7 98. 8

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